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| (R) ESDA14V2-4BF2 QUAD BIDIRECTIONAL TRANSILTM ARRAY FOR ESD PROTECTION ASD (Application Specific Devices) APPLICATION Where transient overvoltage protection in ESD sensitive equipment is required, such as : Computers Printers Communication systems and cellular phones Video equipment This device is particularly adapted to the protection of symmetrical signals. Flip-Chip (5 Bumps) DESCRIPTION The ESDA14V2-4BF2 is a monolithic array designed to protect up to 4 lines in a bidirectional way against ESD transients. The device is ideal for situations where board space saving is requested. FEATURES 4 Bidirectional Transil functions ESD Protection: IEC61000-4-2 level 4 Stand off voltage: 12 V Min. Low leakage current < 1 A 50 W Peak pulse power (8/20 s) BENEFITS High ESD protection level High integration Suitable for high density boards COMPLIES WITH THE FOLLOWING STANDARDS: IEC61000-4-2 15 kV (air discharge) 8 kV (contact discharge) MIL STD 883F- Method 3015-7: class3 25 kV (human body model) Table 1: Order Code Part Number ESDA14V2-4BF2 Marking EA Figure 1: Pin Configuration (Bump side) A1 A3 C1 C3 GND Figure 2: Pin Configuration (Bump Side) 3 2 1 A B C TM: TRANSIL is a trademark of STMicroelectronics. January 2006 REV. 3 1/7 ESDA14V2-4BF2 Table 2: Absolute Ratings (limiting values) Symbol VPP ESD discharge Parameter MIL STD 883E - Method 3015-7 IEC61000-4-2 air discharge IEC61000-4-2 contact discharge Value 25 15 8 50 125 -55 to +150 260 -40 to +125 Unit kV W C C C C PPP Tj Tstg TL Top Peak pulse power (8/20 s) Junction temperature Storage temperature range Lead solder temperature (10 seconds duration) Operating temperature range Table 3: Electrical Characteristics (Tamb = 25 C) Symbol VBR IRM VRM VCL Rd IPP C Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Capacitance Slope: 1 / Rd IPP VCL VBR VRM V I VBR min. Part Number V @ IR max. IRM max. @ VRM Rd typ. note 1 3.2 T max. note 2 10-4/C 10 C max. 0V bias pF 15 V 18 mA 1 A 1 0.1 V 12 3 ESDA14V2-4BF2 14.2 Note 2: VBR = T (Tamb -25 C) x VBR (25 C) Note 1: Square pulse, IPP = 3A, tp = 2.5 s. 2/7 ESDA14V2-4BF2 Figure 3: Clamping voltage versus peak pulse current (Tj initial = 25 C) (Rectangular waveform, tp = 2.5 s) IPP(A) 10.0 tp = 2.5s Figure 4: Capacitance versus reverse applied voltage (typical values) C(pF) 14 12 10 8 F=1MHz VOSC=30mVRMS Tj=25C 1.0 6 4 2 VCL(V) 0.1 0 10 20 30 40 50 60 0 0 2 4 6 VR(V) 8 10 12 14 Figure 5: Relative variation of leakage current versus junction temperature (typical values) IR[Tj] / IR[Tj=25C] 1000 Figure 6: ESD response to IEC61000-4-2 (+15 kV air discharge) 100 V(i/o) 10 Tj(C) 1 25 50 75 100 125 Figure 7: ESD response to IEC61000-4-2 (-15 kV air discharge) Figure 8: Analog crosstalk Typical crosstalk response of ESDA14V2-4BF1 (A1/A3 line) 0.00 -10.00 -20.00 -30.00 V(i/o) -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 -100.0 100.0k 1.0M 10.0M 100.0M 1.0G f/Hz 3/7 ESDA14V2-4BF2 Figure 9: Digital crosstalk rise time: t10-90% = 3ns VG1 VIN = A1 V = 0-3V F = 5MHz 21VG1 VOUT = C3 Figure 10: Application example A1 Connector A3 C1 C3 IC to be protected B2 Figure 11: Aplac model A1 1.2pF 100m 1.2pF 100m A3 1.2pF 100m C1 C3 1.2pF 100m D02_r BV = 16 IBV = 1m CJO = 200p M = 0.3333 RS = 1 VJ = 0.6 TT = 100n D02_r D02_f BV = 16 IBV = 1m CJO = 10.4p M = 0.3333 RS = 2 VJ = 0.6 TT = 100n B2 B2 50pH 50m 160pH 1.8 4/7 ESDA14V2-4BF2 Figure 12: Ordering Information Scheme ESDA ESD Array Breakdown Voltage 14V2 = 14.2 Volts min. Number of line 4 = 4 lines Type B = Bidirectional Package F = Flip-Chip x = 2: Leadfree Pitch = 500m, Bump = 315m 14V2 - 4 B Fx Figure 13: FLIP-CHIP Package Mechanical Data 700m 50 315m 50 650m 65 1.12 mm 50m Figure 14: Foot print recommendations Figure 15: Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter : 250m recommended , 300m max 1.12 mm 50m 49 5 m 40 E Solder stencil opening : 330m Solder mask opening recommendation : 340m min for 315m copper pad diameter xxz y ww 5/7 ESDA14V2-4BF2 Figure 16: FLIP-CHIP Tape and Reel Specification Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1 1.75 +/- 0.1 3.5 +/- 0.1 0.73 +/- 0.05 All dimensions in mm In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 4: Ordering Information Ordering code ESDA14V2-4BF2 Marking EA Package Flip-Chip Weight 2.1 mg Base qty 5000 Delivery mode Tape & reel 7" Note: More informations are available in the application notes: AN1235: "Flip-Chip: Package description and recommendations for use" 8 +/- 0.3 ST E ST E ST E xxz yww User direction of unreeling xxz yww xxz yww 4 +/- 0.1 Table 5: Revision History Date 14-Mar-2005 18-Oct-2005 Revision 1 2 First issue. Dimension from center bump to corner bump changed in Figure 13 to indicate diagonal instead of perpendicular measurement. No values changed. ECOPACK statement added. Die dimensions changed in Figure 13. Cavity depth changed in Figure 16 Description of Changes 17-Jan-2006 3 6/7 ESDA14V2-4BF2 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 7/7 |
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